1. Field of the Invention
The present invention relates to a method of preventing a bit error which occurs in nonvolatile semiconductor memories due to a read disturb or the like, and relates to an information processing apparatus for achieving the prevention method.
2. Description of the Background Art
NAND flash memories, among nonvolatile memories, are heavily used for SD memory cards or the like for the purpose of achieving high integration, reduction in manufacturing cost and easy writing for users by simplifying circuit configurations.
In recent, NAND flash memories are adopted for game machines or the like. When the NAND flash memories are used for game machines, there occurs no write operation but only consecutive read operations. In other words, NAND flash memories have been increasingly adopted as ROMs.
Since specific programs are repeatedly read out in the game machines or the like in most cases, however, it begins to be noticed that the programs could be unintendedly rewritten. Such a phenomenon is termed “read disturb phenomenon”, and the mechanism of this phenomenon will be briefly discussed below.
FIG. 6 is a schematic diagram showing an NAND flash memory. The NAND flash memory is constituted of a bit line 41 and word lines 42, 43 and 44 which are arranged in a lattice manner, memory cells 52 and 53, a selection transistor 54 and the like.
In a case where binary data (“0” or “1”) stored in the memory cell 52 is read out, the memory cell 52 is a selected cell and the memory cell 53 is an unselected cell. First, the selection transistor 54 specifies the bit line 41 to which the selected cell 52 belongs. Next, a low gate voltage (V(Low)=0V) is applied to the word line 42 to which the selected cell 52 belongs. Then, a high gate voltage (V(High) of approximately 5V) is applied to the word line 43 to which the unselected cell 53 belongs. At that time, since the unselected cell 53 is in a very weak writing condition, electrons are trapped in a floating gate of the unselected cell 53 and accumulated therein. In other words, when binary data stored in the selected cell 52 is repeatedly read out, there is a possibility that a threshold voltage of the unselected cell 53 might be shifted and binary data stored in the unselected cell 53 might be unintendedly rewritten, being changed from “1” to “0”.
Even if the binary data stored in the unselected cell 53 is unintendedly rewritten, however, when data are collectively erased before new data are written, it is possible to recover the function of the unselected cell 53. But, if there occurs no write operation and only consecutive read operations, it is impossible to recover the function of the unselected cell 53.
Specifically, herein, a bit error refers to a reversible error caused by a change of the binary data stored in the cell with time, not an irreversible error due to a physical damage. Above all, the bit error due to the read disturb (i.e., read disturb error) is caused by repeated read operations in a specified memory area of a flash memory with no write or erase operation.
US Patent Application Publication No. 2005/0210184 discloses means for avoiding the above-discussed read disturb phenomenon.
In flash memories, generally, the reliability of data is assured by containing an error correction function. As the error correction function, for example, ECC (Error Check and Correct) is used. In the case of using the function of ECC, by installing an ECC (Error-Correcting Code) in a flash memory in advance, even when an error (including a bit error) occurs in the flash memory, if it is an error of several bits, the error is checked when data is read out and the error can be corrected. In one case, for example, where 8-bit error correcting code is set for 64-bit data, when an error occurs, if it is an error of 1 bit, the error can be corrected and outputted.
In NAND flash memories, for example, there is a possibility, however, that an error due to the read disturb may occur in all the unselected cells on the same bit line as the selected cell exists. For this reason, if a specified cell is repeatedly selected, a bit error over the installed error correction capability may eventually occur. Further, this type of error correction function usually corrects only the error of data to be outputted but can not repair the nonvolatile semiconductor memories.